专用集成电路与系统国家重点实验室
Short Course

Short Course: High-level Synthesis Boosting the Design Productivity in the IoT Era
报告人:Deming Chen (University of Illinois, Urbana-Champaign)
时  间:2015年10月14日(周三)下午13:30-16:30
地  点:张江校区微电子楼389室

Introduction
The Internet has become the most pervasive technology, which has infiltrated every aspect of our lives. It is predicted that there will be 50 billion devices connected in the Internet of Things (IoT) by 2020. This explosion of devices naturally demands low design cost and fast time-to-market for producing highly energy-efficient ICs. Meanwhile, big data accumulated through these devices need to be processed timely, which demands high processing power under energy constraints for datacenters.  Such substantial demands on high performance and energy efficiency in different markets would lead to continued increases of IC complexity and capacity. Given all these new trends, a significant problem facing the industry is that the design productivity for complex ICs has been lagging behind. High-level synthesis (HLS) has been touted as a solution to this problem, as it can significantly reduce the number of man hours required for a design by raising the level of design abstraction. In this short course, Prof. Deming Chen will first provide an overview of high-level synthesis, its promises and challenges, and then he will introduce the key steps involved with high-level synthesis and some popular algorithms that are advancing the state-of-the-art solutions in this exciting area. In addition, he will introduce how to effectively use commercial high-level synthesis tools to generate high-quality hardware.

Biography
Dr. Deming Chen obtained his BS in computer science from University of Pittsburgh, Pennsylvania in 1995, and his MS and PhD in computer science from University of California at Los Angeles in 2001 and 2005 respectively. He worked as a software engineer between 1995-1999 and 2001-2002. He joined the ECE department of University of Illinois at Urbana-Champaign in 2005 and has been a full professor in the same department since 2015. He is a research professor in the Coordinated Science Laboratory and an affiliate professor in the CS department. His current research interests include system-level and high-level synthesis, computational genomics, nano-systems design and nano-centric CAD techniques, GPU and reconfigurable computing, and hardware security. He has given more than 70 invited talks sharing these research results worldwide.
Dr. Chen is a technical committee member for a series of conferences and symposia, including FPGA, ASPDAC, ICCD, ISQED, DAC, ICCAD, DATE, ISLPED, FPL, HiPC, etc. He also served as session chair, panelist, panel organizer, or moderator for these and other conferences. He is the TPC Subcommittee or Track Chair for ASPDAC'09-11 and '13, ISVLSI'09, ISCAS'10-11, VLSI-SoC'11, ICCAD'12, ICECS'12, ISLPED'14-15, and ICCD'14-15. He is the General Chair for SLIP'12 and FPGA'16, the CANDE Workshop Chair in 2011, the Program Chair for PROFIT'12 and FPGA'15, and Program Co-chair for the First International Workshop on High-performance Reconfigurable Computing (H2RC). He is or has been an associated editor for TCAD (IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems), TODAES (ACM Transactions on Design Automation of Electronic Systems), TVLSI (IEEE Transactions on Very Large Scale Integration Systems), TCAS-I (IEEE Transactions on Circuits and Systems I), JCSC (Journal of Circuits, Systems and Computers), and JOLPE (Journal of Low Power Electronics). He obtained the Achievement Award for Excellent Teamwork from Aplus Design Technologies in 2001, the Arnold O. Beckman Research Award from UIUC in 2007, the NSF CAREER Award in 2008, and five Best Paper Awards for ASPDAC'09, SASP'09, FCCM'11, SAAHPC'11, and CODES+ISSS'13. He is included in the List of Teachers Ranked as Excellent in 2008. He received the ACM SIGDA Outstanding New Faculty Award in 2010, and IBM Faculty Award in 2014 and 2015. He is a senior member of IEEE and the Donald Biggar Willett Faculty Scholar.
Dr. Chen was involved in two startup companies. He implemented his published algorithm on CPLD technology mapping when he was a software engineer in Aplus Design Technologies, Inc. in 2001, and the software was exclusively licensed by Altera and distributed to many customers of Altera worldwide. He is one of the inventors of the xPilot High Level Synthesis package developed at UCLA, which was licensed to AutoESL Design Technologies, Inc. Aplus was acquired by Magma in 2003, and AutoESL was acquired by Xilinx in 2011. He has also served as a consultant for several leading semiconductor companies.

 
 
 
 

 

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