讲座信息

题  目:Latest Process & Foundry development in Intel. And Design BKM (Best Known Methodology) for Reliability
报告人:Chi-Yeu (Andrew) Chao(Intel)
时  间:2013年9月4日(周三)15:00-16:00
地  点:张江校区微电子楼389会议室

Bio & Abstract:
Chi-Yeu (Andrew) Chao is currently an Analog IP manager at Intel’s Custom Foundry Division, leading the high speed IO and analog building block development in latest 14nm and 22nm process generations. Prior to joining ICF, he was the analog & clock generation technical lead in multiple CPU projects. And the PLL expert in Corporate’s Reviewing Council. His interest goes beyond component design. And was once a platform power management & thermal control architect led platform design solution for Centrino generations. Chi-Yeu graduated from SUNY at Stony Brook with a MSEE Degree. He holds 9 patents and 4 Intel Technical papers.

The internet evolution not only changes the electronic & software industry, but most importantly puts an unprecedented pressure on silicon technology development. Some Scholar even proclaims the progression of human Society is heavily depending on our ability to keep the Moore’s Law alive. In this talk you’ll have an overview of Intel’s latest silicon development across multiple research dimensions, and its latest venture in foundry business & offerings. We’ll also have an in-depth introduction on design for reliability challenges in FinFET & deep sub-micron technology, and best known practice to minimize their impacts in analog design. (Note: This talk is strictly from personal view, not representing official position from Intel Corporation)

 
 
 
 

 

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