专用集成电路与系统国家重点实验室
系列讲座

题  目:Design of Multi-Standard Video Decoder for Power and Cost Efficiency in a System Perspective
报告人:刘佩林教授  上海交通大学
时  间:2009年3月31日(周二)下午13:30-14:30
地  点:张江校区微电子楼389

Abstract:
This talk will focus on the design of Multi-Standard Video Decoder for Power and Cost Efficiency in a System Perspective. Our Multi-Standard Video Decoder core is designed to meet the requirement of low cost, low power and high quality video-decoding applications. It is built to support several current key video compressing standards, including H.264, MPEG-2 and AVS. Features such as super high performance and high flexibility are combined into our decoder. Compared with other video decoding solutions, our decoder core reduces the consumption of power, area and system cost while retaining excellent performance, making it easily stand out from fierce competition. This talk will introduce these high-lighted techniques used in the multi-standard video decoder.

Bio:
Professor Liu Peilin is a PhD Graduate (1992~1998) from the University of Tokyo majoring in Electronic Engineering and worked there as a Researcher in 1999. After that, she was hired as a Senior Researcher for Central Research Institute of Fujitsu, Tokyo (1999~2003). Her research mainly focuses on Multimedia (Audio/Video) Processing, IC Design and High-performance Processor Development. She is now a professor of Department of Electronic Engineering in Shanghai Jiao Tong University, Chief of MediaSoC Lab and responsible for a series of important projects, such as HDTV SoC Platform Development, High-Performance Portable Audio/Video System, etc.

 
 
 
 

 

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