讲座信息

Flexible VLSI Architectures for UWB, MIMO and Cognitive Radio

 

 

Prof. Gerald E. Sobelman

Dept. of Electrical and Computer Engineering

University of Minnesota

Minneapolis, MN 55455 USA

http://mountains.ece.umn.edu/~sobelman/

 

 

IEEE Circuits and System Society

Distinguished Lecturer Program

 

 

Abstract of Lecture

 

Flexibility and efficiency will be key design requirements for future communications transceivers. Systems must be reconfigurable and adaptable in order to minimize power and maximize bandwidth as environmental conditions and user requirements change. This lecture will present architectures and design techniques to achieve these goals for Ultra Wideband (UWB), multiple antenna (MIMO) and Cognitive Radio systems.

 

We will begin with a class of UWB systems based on Orthogonal Frequency Division Multiplexing (OFDM). The standard approach uses large FFTs, which can require a significant amount of hardware resources. An attractive design alternative known as Pulsed-OFDM UWB can achieve the same system-level performance while requiring less hardware and power. We will describe flexible architectures to implement these OFDM-based systems. In addition, we will also present a hardware model of the UWB channel in order to achieve faster system-level verification.

 

The performance of MIMO systems scales with the number of antennas, so extremely high throuphputs are possible. In practice, however, the design complexity also increases rapidly with the number of antennas, so it is crucial to develop efficient implementations for such systems. We will describe a promising approach based on the Geometric Mean Decomposition (GMD) and we will give throughput and design complexity results for a range of MIMO systems.

 

Cognitive radio seeks to take advantage of the local spectrum conditions in order to maximize throughput whenever possible. This requires a flexible platform in which many aspects of the system can be reconfigured dynamically. For example, the parameters associated with digital filters, FFTs and interleavers may have to be adjusted in order to implement a new data rate, modulation scheme or detection algorithm. In addition, the connections between various functional units may have to be altered to implement different data flow requirements. Programmable functional units and network-on-chip architectures will be described to address these issues.

 


Brief Biography

 

 

Gerald E. Sobelman received a B.S. degree in physics from the University of California, Los Angeles. He was awarded M.S. and Ph.D. degrees in physics from Harvard University. He was a postdoctoral researcher at The Rockefeller University, and he has held senior engineering positions at Sperry Corporation and Control Data Corporation.

 

He is currently a faculty member in the Department of Electrical and Computer Engineering at the University of Minnesota. He also serves as the Director of Graduate Studies for the Graduate Program in Computer Engineering at the University of Minnesota.

 

Prof. Sobelman is a Senior Member of IEEE and serves on the technical program committees for IEEE ISCAS, IEEE SOCC and IEEE ICCSC. He is currently Chair-Elect of the Technical Committee on Circuits and Systems for Communications (CASCOM) of the IEEE Circuits and Systems Society. He has also served as an Associate Editor of IEEE Signal Processing Letters. In addition, he has chaired many sessions at international conferences in the areas of communications and VLSI design, and he is a Distinguished Lecturer of the IEEE Circuits and Systems Society.

 

He has developed and presented short courses on digital VLSI design at several industrial sites. He has also given invited lectures at universities in the U.S., South Korea, China and Malaysia, and he has been a consultant to several companies.

 

He current research interests are in the areas of digital VLSI circuit and system design for applications in communications and signal processing. He has authored or co-authored more than 90 technical papers and 1 book, and he holds 11 U.S. patents.

 

时间:2008410日(星期四)下午2:00-4:00

地点:张衡路825 复旦大学张江校区 行政楼小报告厅

 
 
 
 

 

Copyright© 2003-2018 复旦大学微电子学院
联系我们