薛晓勇,博士,男,出生于1984年8月,山西运城人,2011年毕业于复旦大学微电子系,获博士学位,2015年9月加入复旦大学微电子学院,任讲师,主要从事存储器设计及应用相关研究,以第一作者或通信作者先后在国际著名杂志(JSSC、TVLSI)和会议(Symposia on VLSI Circuits、IMW、ISCAS)发表多篇论文,申请专利15项,获授权6项。

研究方向:

  1. 存储器电路设计,包括RRAM、PRAM、MRAM、SRAM和DRAM等;
  2. 新型存储器在神经网络计算架构及逻辑电路中的应用;
  3. 先进工艺监测与表征。

发表列表:
专著:

[1] 林殷茵,宋雅丽,薛晓勇,《阻变存储器:器件、材料、机理、可靠性及电路》,科学出版社, 2014 (ISBN:9787030414991)

专著章节:
[1] Yinyin Lin, Yali Song, Xiaoyong Xue,“RRAM device and circuit” in Data Storage at the Nanoscale: Advances and Applications (Edited by Fuxi Gan and Yang Wang), Pan Stanford Publishing Pte. Ltd. (2015). (ISBN: 978-981-4613-19-4 (Hardcover), 978-981-4613-20-0 (eBook)

 

杂志:
[1] Xiaoyong Xue, Jianguo Yang, Yinyin Lin*, Ryan Huang, Qingtian Zou, Jingang Wu, “Low Power Variation-tolerant Nonvolatile Look-up Table Design”, IEEE Transactions on Very Large Scale Integration Systems (TVLSI), 2015. (Accepted)
[2] Xiaoyong Xue, Yinyin Lin* et al., “A 0.13 μm 8 Mb Logic-Based CuxSiyO ReRAM With Self-Adaptive Operation for Yield Enhancement and Power Reduction”, IEEE Journal of Solid-State Circuits(JSSC), vol. 48, no. 5, May 2013.
[3] Yufeng Xie, Wenxiang Jian, Xiaoyong Xue, Gang Jin, Yinyin Lin, “64Kb logic RRAM chip resisting physical and side-channel attacks for encryption keys storage”, IEICE Electron. Express(ELEX), 2012, vol. 9 (no. 12), pp 1051-1056.
[4] Xiaoyong Xue, Yufeng Xie, Yinyin Lin, “Novel 2T programmable element to improve density and performance of FPGA,” IEICE Electron. Express(ELEX), 2011, vol. 8(no. 7), pp 454-459. (SCI)
[5] Ji ZHANG, Yiqing DING, Xiaoyong XUE, Gang JIN, YuxinWU, Yufeng XIE Yinyin LIN, “A 3D RRAM Using a Stackable Multi-Layer 1TXR Cell,” IEICE TRANS. ELECTRON., 2010, vol. E93–C(no.12): 1692-1699.

会议论文:
[1] Yinyin Lin, Rui Yuan, Xiaoyong Xue*, B.A. Chen, “3D Vertical RRAM Architecture and Operation Algorithms with Effective IR-Drop Suppressing and Anti-Disturbance”, ISCAS, 2015. (Invited)
[2] Renhua Yang, Xiaoyong Xue, Yufeng Xie, Yinyin Lin*., "A Novel Method for Accurate Measurement and Decoupling of SRAM Standby Leakage," IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Guilin, China, 2014.
[3] Y. Meng, X.Y. Xue, Y.L. Song, J.G. Yang, Y.Y. Lin*, “Fast Step-Down Set Algorithm of Resistive Switching Memory with Low Programming Energy and Significant Reliability Improvement”, Symposium on VLSI Technology(VLSIT), pp. 198-199, Jun. 12-14, Honolulu, Hawaii, USA, 2014.
[4] J. Yang, M. Ying, X. Xue, R. Huang, Q. Zou, J. Wu and Y. Lin*, "A 2Mb ReRAM with two bits error correction codes circuit for high reliability application," International Conference on ASIC (ASICON), 2013, pp. 1-4.
[5] Y. L. Song, Y. Meng, X. Y. Xue, F. J. Xiao, Y. Liu, B. Chen, Y. Y. Lin*, “Reliability Significant Improvement of Resistive Switching Memory by Dynamic Self-adaptive Write Method”, Symposium on VLSI Technology(VLSIT), pp. 102-103, Jun. 11-13, Kyoto, Japan, 2013.
[6] X. Y. Xue, et al., “A Logic-Based Embedded DRAM with Novel Cell Structure and Dynamically Adaptive Refresh for Long Data Retention, Zero Data Availability Penalty and High Yield”, International Memory Workshop (IMW), pp. 132-134, May 26-30, Monterey, USA, 2013
[7] Gang Chen, Xiaoyong Xue*, Qing Dong, Fanjie Xiao, Hao Chen, Yinyin Lin, “A Novel Low Power Wide Supply Voltage Range CMOS Temperature Sensor with -0.2/0.5℃Error from -20℃to 60℃,” IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Oct. 29-Nov. 1, Xi’an, China, 2012.
[8] Qing Dong, Xiaoyong Xue, Yinyin Lin* et al., "A Novel Method for Accurate Measurement and Decoupling of SRAM Standby Leakage," IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Oct. 29-Nov. 1, Xi’an, China, 2012.
[9] X. Y. Xue, Y. Y. Lin* et al., “A 0.13μm 8Mb Logic Based CuxSiyO Resistive Memory with Self-Adaptive Yield Enhancement and Operation Power Reduction”, Symposium on VLSI Circuits(VLSIC), pp. 42-43, Jun. 12-14, Honolulu, Hawaii, USA, 2012.
[10]Xiaoyong Xue, Wenxiang Jian, Yufeng Xie, Qing Dong, Rui Yuan, Yinyin Lin*, "Novel RRAM programming technology for instant-on and high-security FPGAs," pp. 291-294, IEEE International Conference on ASIC (ASICON), Oct. 25-28, Xiamen, China, 2011.
[11]Ji Zhang, Yiqing Ding, Xiaoyong Xue, Gangjin, Yuxin Wu, Yufeng Xie, Yinyin Lin*, “A 3D RRAM Using Stackable 1TXR Memroy Cell for High Density Application,” IEEE International Conference on Communications, Circuits and Systems (ICCCAS), 2009, pp 917-920.
[12]Xiaoyong Xue, Gang Jin, Ji Zhang, Le Xu, Yiqing Ding, Yufeng Xie, Changhong Zhao, Chen B.A., Yinyin Lin*. “Nonvolatile SRAM cell based on CuxO”, IEEE International Conference on Solid-State and Integrated-Circuit Technology (ICSICT), 2008, pp 869-871.

 
 
 
 

 

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