解玉凤

复旦大学微电子学院 副教授
电话:021-51355206-870
E-mail:xieyf@fudan.edu.cn

 

主要经历:
2008年4月-至今 :  复旦大学微电子学院讲师、副教授
2002年9月-2008年1月:清华大学微电子学研究所,博士
1998年9月-2002年7月:西安交通大学电子科学与技术系,本科
2002年1月-2002年6月:新加坡南洋理工大学,交流访问
2009年6月-2009年8月:比利时欧洲微电子中心(IMEC),交流访问

研究方向:
(1)面向应用的存储器电路及系统设计研究,包括面向安全应用的新型存储器电路设计、提高可靠性的新型存储器电路设计技术、面向高速数据流的存储设计技术等;
(2)基于新型器件的电路及系统设计研究;
(3)提升制造业智能化的信息技术研究,等。

主要项目情况:
1、国家自然科学基金青年基金,“基于逻辑阻变非挥发存储的安全密钥芯片研究”,主持,2011.1-2013.12
2、国家科技重大专项01专项,“高速低功耗高可靠DRAM电路优化设计方法”,主持,2011.1-2012.12
3、上海市自然科学基金,“基于阻变存储器实现高安全性FPGA配置数据流保护的关键技术研究”,主持,2014.7-2017.6
4、国家863课题,“RRAM设计IP和嵌入式应用验证”, 排第二, 2011.1-2015.12
5、国家863课题,“基于标准逻辑工艺的阻变存储材料与器件关键技术”,排第二,2014.1-2016.12
6、国家973子课题,“PCRAM的电路模拟与优化设计”, 排第三,2007.1-2011.12
7、国家863课题,“电阻随机存储器存储材料与关键技术”,骨干参与,2008.1-2010.12
8、专用集成电路与系统国家重点实验室面上项目,“面向高性能嵌入式应用的非易失阻变存储器设计研究”,2008.7-2009.6
9、产学研课题,“智能光伏电站信息系统设计研究”,2016.3-2017.2

主要论文及专利情况:
1、Yufeng Xie; Xiaoyong Xue ; Jianguo Yang ; Yinyin Lin ; Qingtian Zou ; Ryan Huang ; Jingang Wu, A Logic Resistive Memory Chip for Embedded Keys Storage with Physical Security , IEEE Transactions on Circuits and Systems II:Express Briefs, Volume:63, Issue:4, Pages: 336 – 340,2016.
2、Yufeng Xie, Wenxiang Jian, Xiaoyong Xue, Gang Jin, Yinyin Lin,64Kb logic RRAM chip resisting physical and side-channel attacks for encryption keys storage, IEICE Electronics Express, Vol. 9, No. 12 , pp. 1051-1056, 2012.
3、Xiaoyong Xue, Yufeng Xie*, Yinyin Lin*, Novel 2T programmable element to improve density and performance of FPGA, IEICE Electronics Express, Vol.8, No.7, (2011), pp. 454-459.
4、Yu-Feng Xie, Kuan Cheng, Yin-Yin Lin, A logic 2T gain cell eDRAM with enhanced retention and fast write scheme, IEEE International Conference on Solid-State and Integrated-Circuit Technology (ICSICT),2012
5、Bing Yan, Yufeng Xie*, Rui Yuan, Yinyin Lin*, A BIST Scheme for High-speed Gain Cell eDRAM, IEEE 9th International Conference on ASIC (ASICON),Publication Year: 2011 , Page(s): 244 – 247.
6、Le Xu, Yufeng Xie*, Yinyin Lin*, High-reliable multi-level Phase Change Memory with Bipolar Selectors, IEEE 8th International Conference on ASIC (ASICON)(国际EI),Publication Year: 2009, Page(s): 1011 – 1014.
7、Ji Zhang, Yiqing Ding, Xiaoyong Xue, Gangjin, Yuxin Wu, Yufeng Xie*, Yinyin Lin*, A 3D RRAM Using Stackable ITXR Memory Cell for High Density Application, International Conference on8 Communications, Circuits and Systems (ICCCAS)(国际EI), Publication Year: 2009, Page(s): 917 – 920.
8、Xiaoyong Xue, Wenxiang Jian, Jianguo Yang, Fanjie Xiao, Gang Chen, Shuliu Xu, Yufeng Xie, Yinyin Lin, Ryan Huang, Qingtian Zou, and Jingang Wu, A 0.13 μm 8 Mb Logic-Based CuxSiyO ReRAM With Self-Adaptive Operation for Yield Enhancement and Power Reduction, IEEE Journal of solid-state circuits (JSSC), Vol.48, No.5, 2013, pp.1315-1322.
9、Xiaoyong Xue; Wenxiang Jian.; Jianguo Yang; Fanjie Xiao; Gang Chen; Xu, X.L.; Yufeng Xie; Yinyin Lin; Huang, R.; Zhou, Q.T.; Wu, J.G., A 0.13μm 8Mb logic based CuxSiyO resistive memory with self-adaptive yield enhancement and operation power reduction, IEEE Symposium on VLSI Circuits (VLSIC) ,Publication Year: 2012 , Page(s): 42 – 43.
10、Renhua Yang; Xiaoyong Xue; Yufeng Xie; Yinyin Lin, Adaptive Block level management for hybrid main memory, 12th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), 2014, Pages: 1 – 3.
11、Ji Zhang, Yiqing Ding, Xiaoyong Xue, Gang Jin, Yuxin Wu, Yufeng Xie,Yinyin Lin, A 3D RRAM Using a Stackable Multi-Layer 1TXR Cell, IEICE Transactions,Vol. 93-C, 2010, pp. 1692-1699.
12、Xiaoyong Xue, Wenxiang Jian, Yufeng Xie, Qing Dong, Rui Yuan, Yinyin Lin*, Novel RRAM Programming Technology for Instant-on and High-security FPGAs, IEEE 9th International Conference on ASIC (ASICON), Publication Year: 2011 , Page(s): 291 – 294.
13、Xiaoyong Xue; Yarong Fu; Yanqing Zhao; Juan Xu; Jianguo Yang; Yufeng Xie; Yinyin Lin; Ryan Huang; Qingtian Zou; Jingang Wu, Dynamic Data-dependent Reference to Improve Sense Margin and Speed of Magnetoresistive Random Access Memory, IEEE Transactions on Circuits and Systems II: Express Briefs, 2016.
14、以第一发明人申请专利十余项,其中已授权专利4项:

主讲课程:
1、《数字逻辑基础》,本科生专业基础课,校级精品课程
2、《嵌入式系统设计》,研究生选修课
3、《数字集成电路设计》,工程硕士专业课

学术活动:
1、 ASSCC 2011/2010, memory session TPC member
2、ASICON 2011, memory session co-chair

 
 
 
 

 

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