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Biography
Wai-Shing Luk was born in Hong Kong. He graduated
from Chinese University of Hong Kong in 1988 with a B.Sc degree
in Electronics. He received his M.Phil and Ph.D degrees in Computer
Science and Engineering from the same university in 1993 and 1996
respectively. In 1997, he was awarded a postdoctoral fellowship
at Katholieke Universiteit Leuven in Belgium. Before joining Fudan
University, he worked as a senior R&D engineer for over four
years at Synopsys, Inc., a leading electronics design automation
(EDA) company, in USA. He has published over ten papers in international
conferences and reviewed journals. His recent co-authored paper
"Timing Yield Driven Clock skew Scheduling Considering non-Gaussian Distributions
of Critical Path Delays" (to be presented at the 46th Design Automation Conference, 2008)
has been got attention by independent experts in the field.
One reviewer comments that "this paper ....overcomes the problem
of non-Gaussian nature by using the CDF of the timing path and applying
the reverse CDF to obtain the appropriate solution. I believe this work
is technically sound and is novel enough to merit publication."
His current research interests include VLSI CAD algorithms and circuit simulation.
Selected Recent Publications:
- Yi Wang, Wai-Shing Luk, Xuan Zeng, Jun Tao, Changhao Yan, Jiarong Tong,
Wei Cai, Jia Ni, Timing Yield Driven Clock Skew Scheduling Considering non-Gaussian
Distributions of Critical Path Delays, DAC’08, USA (to appear).
- Qiang Fu, Wai-Shing Luk, Jun Tao, Changhao Yan, Xuan Zeng.
Characterizing Intra-die Spatial Correlation Using Spectral Density Method.
in Proceeding of 9th International Symposium on Quality Electronic Design, USA, pp.718-723, 2008.
- Huiping Huang, Wai-Shing Luk, Wenqing Zhao and Xuan Zeng,
DME-Based Clock Routing in the Presence of Obstacles,
in Proceedings of 7th International Conference on ASIC, pages 1225-1228, 2007.
- Xuexin Liu, Wai-Shing Luk, Yu Song and Pushan Tang and Xuan Zeng,
Robust Analog Circuit Sizing Using Ellipsoid Method and Affine Arithmetic,
in Proceeding of the 12th Asia and South Pacific Design Automation Conference, pages 203-208, 2007.
Projects:
- Intel project: Pre-silicon Automatic Validation
Tool
- State 863 project: Clock Tree Synthesis for
Nanometer Technology
- NSFC project (applying) : Algorithms for
Alternating Phase Shift Masking
- Seiko porject(completed): Behavior Modeling
01 Final Year
Projects:
- Alternating Phase Shift Masking
- Waveform Comparison Algorithms for IC Design
- Automatic waveform comparison for IC Design
- User Interface Development for GHz VLSI Clock
Tree Synthesis Tool
Teaching:
- 《C Programming》(2004)
- 《软件基础课程》(2005)
Lab Management:
- SW & HW configuration (SUN Solaris & PC
Linux）
- IT management for EDA tool development
Websites:
Contact Information:
Office:
Microelectronics Department
Fudan University
825 Zhangheng Road
Shanghai 201203
P. R. China
Tel:+86 (21) 51355200-874
E-mail: luk AT fudan Dot edu Dot cn
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