荆明娥,女,副研究员。

个人简历:

  • 2005年4月毕业于西安电子科技大学,获博士学位。
  • 2005-2007年在复旦大学电子科学与技术博士后流动站做博士后。
  • 2007年起任教于复旦大学。

在IEEE trans on CAD(计算机辅助设计,顶级期刊),ISSCC(固态电路会议,顶级会议),ISCAS(电路与系统,高级会议),IEEE trans on CAS(电路与系统,顶级期刊),中国科学,电子学报,半导体学报等国际国内期刊和会议上发表论文四十余篇。IEEE 会员。

研究方向:
集成电路设计,多核处理器映射算法,任务调度,EDA算法设计,编译器设计。

主持项目:

  • 国家自然科学基金项目(主持),面向多核处理器的任务模块生成与调度映射方法研究,2013.1-2015.12
  • 项目支持:国家自然科学基金面上项目(主持),EDA形式验证中可满足性(SAT)问题的算法研究)。2008.1-2010.12
  • 项目支持:超大规模集成电路参数成品率的建模和优化(主持),中国博士后科学基金(一等),2005-2007.
  • 上海市青年科技启明星计划(排名第2), 面向专用领域的高性能低功耗众核处理器设计的研究,2011.4-2013.3
  • 市科委集成电路专项(排名第4),可扩展的高性能64核处理器及其芯片实现, 2012.9-2014.9
  • 市科委集成电路专项(参与),高性能低功耗众核处理器设计及其在通信及多媒体系统中的应用示范, 2010.1-2012.9.

近期代表著作

  1. Ming-e Jing, Yue Hao, Dian Zhou and Xuan Zeng, A Novel Optimization Method for Parametric Yield: Uniform Design Mapping Distance Algorithm, IEEE Trans. on CAD of Integrated Circuits and Systems, 2007, 26(6):1149-1155. (SCI检索, IDS 号: 173HE), 影响因子:1.271.
  2. Ming-e Jing, Dian Zhou, Pushan Tang. Solving SAT Problem by Heuristic Polarity Decision-Making Algorithm. Sci China Ser F-Inf. 2007,50 (6): 915-925, (SCI检索, IDS 号: 232LF ), 影响因子:0.656.
  3. Ming-e Jing, Yue Hao, Jin-feng Zhang, Pei-jun Ma,Efficient Parametric Yield Estimation of VLSI Circuit by Uniform Design Sampling Method,Microelectronics Reliability,2005,45(1): 155-162,2005.(SCI)
  4. Zhiyi Yu, Kaidi xiao, Ruijin xiao, Heng quan, Peng ou, Yan Ying, Haoyan yang, Ming-e Jing, Xiaoyang Zeng, An 800MHz 320mW 16-core Processor with Message-passing and Shared-memory Inter-core Communication Mechanisms. IEEE International Solid-State Circuits Conference (ISSCC) 2012, pp64-66. (EI检索:20121915008716).
  5. Peng Ou, Jiajie Zhang, Heng Quan, Yi Li, Maofei He, Zheng Yu, Xueqiu Yu, Shile Cui, Jie Feng, Shikai Zhu, Jie Lin, Ming-e Jing, Xiaoyang Zeng, Zhiyi Yu, A 65nm 39GOPS/W 24-Core Processor with 11Tb/s/W Packet Controlled Circuit-Switched Double-Layer Network-on-Chip and Heterogeneous Execution Array. IEEE International Solid-State Circuits Conference (ISSCC) 2013, (EI检索).
  6. Ming-e Jing, Liyang Zhou, Zhiyi Yu, Xiaoyang Zeng, Time-Division-Multiplexer based Routing Algorithm for NoC System, in IEEE International Symposium on Circuits and Systems (ISCAS), May, 2013.(EI)
  7. Ming-e Jing, Jiayi Sheng, Haofan Yang, Zhiyi Yu, Xiaoyang Zeng, Implementation and Optimization of 3780-point FFT on Multi-core System, in IEEE International Symposium on Circuits and Systems (ISCAS), May, 2013.(EI)
  8. 荆明娥,周电,唐璞山,启发式极性决策算法解SAT问题. 中国科学E辑:信息科学,2007, 37 (012): 1597-1606.
  9. 荆明娥,陈更生,赵长虹, 唐璞山,周 电。利用正交方法解SAT问题。复旦学报(自然科学版),2008,47(6):786-790.
  10. 荆明娥,周电,唐璞山,利用近似解加速SAT完全算法.计算机辅助设计与图形学学报,2007,19(9):1184-1189. (EI检索:20074210875802).
  11. Ming-e Jing, Pengshuai Ren, Weichao Zhou, Zhiyi Yu, Xiaoyang Zeng, Evaluation of Buffer Organizations for Network-on-Chip[6]. ICSICT ’2012 (EI检索).
  12. Ming-e Jing, Gengsheng Chen, Wenbo Yin, Dian Zhou, Enhance SAT Conflict Analysis for Model Checking, ASIC, 2009. ASICON '09. 7th International Conference on, pp.686-689, 2009. (EI检索:20101112773038)).
  13. Liyang Zhou, Ming-e Jing, Xiaoyang Zeng, Task-Binding Based Branch-and-Bound Algorithm for NoC Mapping, in IEEE International Symposium on Circuits and Systems (ISCAS), May 2012, pp.648-651. (EI检索:20123915474491). (通信作者)
  14. Liulin Zhong, Jiayi Sheng, Ming-e Jing, Zhiyi Yu, Xiaoyang Zeng, Dian Zhou. An Optimized Mapping Algorithm Based on Simulated Annealing for Regular NoC Architecture, 2011. ASICON '11. 8th International Conference on, 2011, 421-424. (EI检索: 20122015028750). (通信作者)
  15. Jiayi Sheng, Liulin Zhong, Ming-e Jing, Zhiyi Yu, Xiaoyang Zeng, A Method of Quadratic Programming for Mapping on NoC Architecture, 2011. ASICON’11. 8th International Conference on, 2011, 224-227 (EI检索: 20122015028709). (通信作者)
  16. Haofan Yang, Ruijin Xiao, Liang Liu, Ming-e Jing, Zhiyi Yu, Xiaoyang Zeng, Dian Zhou,Mapping of Pipeline Flow Chart onto Mesh-based Multi-core NoC Architecture. International Conference on Solid-State and Integrated Circuit Technology, 2010(EI检索:20110413609368). (通信作者)
  17. Derong Liu, Ming-e Jing, Yuwen Wang, Zhiyi Yu, Xiaoyang Zeng, Dian Zhou, Pipeline-based Scheduling for Heterogeneous Multi-core Systems, ICSICT ‘2012,(EI检索) , (通信作者)
  18. Yan Ying, Kaidi You, Liyang Zhou, Heng Quan, Ming-e Jing, Zhiyi Yu, Xiaoyang Zeng, A Pure Software LDPC Decoder on a Multi-Core Processor Platform with Reduced Inter-Processor Communication Cost, in IEEE International Symposium on Circuits and Systems (ISCAS)(EI检索:20123915474215), May 2012.
  19. Shaoxi Wang, Xiaoya Fan, Shengbing Zhang,Ming-e Jing. Analog Layout Retargeting with Geometric Programming and Constrains Symbolization Method, IEEE International Symposium on Circuits and Systems (ISCAS), May, 2012, Seoul, Korea. pp353-356. (EI检索:20123915474410).
  20. Siwat Saibua, Po-Yu Kuo, Dian Zhou,Ming-e Jing. A Folding Strategy for SAT Solvers based on Shannon’s Expansion Theorem, Proceeding of IEEE International SoC Conference (SOCC), 2010 (pp. 177-181)(EI检索:20113014186679)
  21. Changhong Zhao, Jian Chen, Xiaofang Zhou, Ming-e Jing, Dian Zhou. Floorplanning Method Based on Liner Programming, WSEAS TRANSACTIONS on COMPUTERS Issue 11, Volume 5, November 2006. pp.2874-2880. (EI检索:20063310063597)
  22. 黄贝, 尤凯迪, 荆明娥, 曾晓洋, 虞志益,基于多核平台的RS译码器,计算机工程,2012, 38(01) 239-241.
  23. 罗二海,荆明娥,周电,唐璞山。一种快速决策的可满足性问题解决器,计算机辅助设计与图形学学报,2006,18(10):1472-1477. (EI检索:20065010305266).
  24. 尹文波,荆明娥,周电,周晓方。一种改进的有界模型检验子句规则。微电子学与计算,2007,24(11): 103-106,109.
  25. 陈姗姗,周晓方,荆明娥,考虑电压降的SoC布局规划算法,复旦学报(自然科学版),2010,49(2).236-241.
  26. 曹伟,洪琪,侯慧,童家榕,来金梅,闵昊,荆明娥。 一种用于H.264编解码的新型高效可重构多变换VLSI结构, 电子学报, 2009,37(4):473-477.(EI检索:2009201208247
  27. 荆明娥,周电,郝跃,基于RSM和均匀试验的IC成品率设计方法。电路与系统学报,2005年6月,10(3):89-92.
  28. 荆明娥,李康,郝 跃.IC参数成品率全局优化的映射距离最小化算法,半导体学报,2005年6月, 26(6):1259-1293.
  29. 荆明娥,郝跃,VLSI成品率重心游移算法的一个几何解释,半导体学报, 2004, 25(5): 594-596
  30. 郝 跃,荆明娥,马佩军. VLSI集成电路参数成品率及优化研究,电子学报,2003, 31(12A):1971-1974.
  31. 荆明娥,郝 跃,马佩军,集成电路参数中心值和容差的耦合设计方法, 电子与信息学报, 2005, 27(1):139-142.
  32. 荆明娥,郝跃,赵天绪,马佩军,集成电路分档成品率的效益优化模型及求解,西安电子科技大学学报,2004,31(2): 170 -173.
  33. 荆明娥,王宇平. 基于产品最优分档的集成电路整体效益优化模型.西安电子科技大学学报, 2002, 29(2):170-173
  34. 荆明娥,马晓华,郝跃,马佩军,基于RSM和均匀试验的IC成品率设计方法,电路与系统学报:2005, 27(1):139-142.
 
 
 
 

 

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